CS3185 Computer Architecture

Part I

Course Duration: One Semester

Credit Units: 3

Level: B3

Medium of Instruction: English

Pre-requisites:
CS2112 Computer Organization & Assembly Language /or
CS2113 Computer Organization /or
CS2115 Computer Organization

Pre-cursors: Nil

Equivalent Courses: Nil

Equivalent to the Old Course Code & Title:
IT3904 Computer Architecture
IT3202 Computer Architecture

Exclusive Courses: Nil

Part II

Course Aims:

To study fundamentals on computer system architectures. On completion of the course, students should be able to:

-  understand the design and processor functional units, register set, instruction encoding, assembler programming with case study on a processor design;

-  identify some critical issues to achieve performance in processor design and multiprocessing systems;

-  understand the basic operations of cache memory and memory system, bus and I/O interface and operations, interrupt handling and design of I/O devices.

Course Intended Learning Outcomes (CILOs):

Upon successful completion of this course, students should be able to:

No.

CILOs

Weighting
(if applicable)

1.

Describe the functional components in processor design, register sets, instruction codes and execution, addressing modes, basic assembly code and programming;

 

2.

Identify factors in the processor design to achieve performance in single and multiprocessing systems;

 

3.

Explain the operations of cache and main memory, I/O operations, bus controls, I/O interrupts and interfaces, I/O devices and characteristics;

 

4.

Apply the knowledge on system components in processor, memory, bus and I/O operations on the design of a typical computer system.

 

Teaching and learning Activities (TLAs):
(Indicative of likely activities and tasks designed to facilitate students’ achievement of the CILOs. Final details will be provided to students in their first week of attendance in this course)

Teaching pattern:
Suggested lecture/tutorial/laboratory mix: 2 hrs. lecture; 1 hr. tutorial.

CILO No

TLAs

Hours/week
(if applicable)

CILO1 to
CILO3

Lectures to introduce the basic concepts, design considerations and methodologies with case examples.

 

CILO1 to
CILO3

Tutorial sessions used for discussions, exercise questions and case examples on the lecture topics.

 

CILO1 to
CILO4

Coursework assignments will focus on practical questions as well as case examples for study. Students are required to solve and understand some assembly programming problems.

 

Assessment Tasks/Activities:

(Indicative of likely activities and tasks designed to assess how well the students achieve the CILOs. Final details will be provided to students in their first week of attendance in this course)

The CILO1 to CILO4 are assessed by,

CILO No

Type of assessment tasks/activities

Weighting
(if applicable)

Remarks

CILO1

Describe the functional components in  processor design, register sets, instruction codes and execution, addressing modes, basic assembly code and programming.

Coursework - Assignment may include short questions assessing the student understanding on the processor components, number systems, instruction coding and basic understanding on the assembly program.

Quiz and exam - the quiz and examination questions are used to assess the student understanding on the topics.

The coursework, quiz and examination are means to assess this ILO.
  

 

 

CILO2

Identify factors in the processor design to achieve performance in single and multiprocessing systems.

Coursework - The tutorial and assignments will include questions and exercises to discuss and study on cases in the processor design as related to performance in single and multiprocessing systems.

Quiz and exam - may include questions on understanding various processor designs as related to performance.

The coursework, quiz and exam are the means to assess this ILO.
  

 

 

CILO3

Explain the operations of cache and main memory, I/O operations, bus controls, I/O interrupts and interfaces, I/O devices and characteristics.

Coursework - The tutorial and assignments will include questions and exercises to discuss and illustrate the organization of cache and main memory, bus structure, I/O operations and I/O device characteristics.

Quiz and exam - may include questions on understanding on the main memory and cache organizations. I/O operations, bus controls and I/O devices.

The coursework, quiz and exam are the means of assess this CILO.
  

 

 

CILO4

 

 

Apply the knowledge on system components in processor, memory, bus and I/O operations on the design of a typical computer system.

Coursework - students are required to evaluate and to compare the performance of a case example on a typical computer architecture. The submitted work will be used to assess this CILO.
  

 

 

Grading of Student Achievement:

Examination duration: 2 hours
Percentage of coursework, examination, etc.: 30% CW; 70% Exam
Grading pattern: Standard (A+AA-…F)
For a student to pass the course, at least 30% of the maximum mark for the examination must be obtained.

Part III

Keyword Syllabus:

Computer Models. Central Processing Unit.  Memory System.  Cache memory organization.  I/O Interfaces.  CISC and RISC.  Multiprocessors.

Related Links
Department of Computer Science